Symmetric Real FIR (Embedded Target for Texas Instruments C6000 DSPs)

Embedded Target for Texas Instruments C6000 DSPs

Filter a real input signal using a symmetric real FIR filter

Library

C62x DSP Library--Filtering

Description

The Symmetric Real FIR block filters a real input signal using a symmetric real FIR filter. This filter is implemented using a direct form structure.

The number of input samples per channel must be even. The filter coefficients are specified by a real vector H, which must be symmetric about its middle element. The number of coefficients must be of the form 16k + 1, where k is a positive integer. This block wraps overflows that occur. The input, coefficients, and output are 16-bit signed fixed-point data types.

Intermediate multiplys and accumulates performed by this filter result in a 32-bit accumulator value. However, the Symmetric Real FIR block only outputs 16 bits. You can choose to output 16 bits of the accumulator value in one of the following ways.

Match input x
Output 16 bits of the accumulator value such that the output has the same number of fractional bits as the input

Match coefficients h
Output 16 bits of the accumulator value such that the output has the same number of fractional bits as the coefficients

Match high 16 bits of acc.
Output bits 31 - 16 of the accumulator value

Match high 16 bits of prod.
Output bits 30 - 15 of the accumulator value

User-defined
Output 16 bits of the accumulator value such that the output has the number of fractional bits specified in the Number of fractional bits in output parameter

`Match input x`	Output 16 bits of the accumulator value such that the output has the same number of fractional bits as the input
`Match coefficients h`	Output 16 bits of the accumulator value such that the output has the same number of fractional bits as the coefficients
`Match high 16 bits of acc.`	Output bits 31 - 16 of the accumulator value
`Match high 16 bits of prod.`	Output bits 30 - 15 of the accumulator value
`User-defined`	Output 16 bits of the accumulator value such that the output has the number of fractional bits specified in the Number of fractional bits in output parameter

The Symmetric Real FIR block supports discrete sample times and only little-endian code generation.

Dialog Box

Coefficient source: Specify the source of the filter coefficients:

Specify via dialog--Enter the coefficients in the Coefficients parameter in the dialog
Input port--Accept the coefficients from port H

Coefficients: Enter the coefficients in vector format. This parameter is visible only when Specify via dialog is specified for the Coefficient source parameter. This parameter is tunable in simulation.
Set fractional bits in coefficients to: Specify the number of fractional bits in the filter coefficients:

Match input X--Sets the coefficients to have the same number of fractional bits as the input
Best precision--Sets the number of fractional bits of the coefficients such that the coefficients are represented to the best precision possible
User-defined--Sets the number of fractional bits in the coefficients with the Number of fractional bits in coefficients parameter
This parameter is visible only when Specify via dialog is specified for the Coefficient source parameter.

Number of fractional bits in coefficients: Specify the number of bits to the right of the binary point in the filter coefficients. This parameter is visible only when Specify via dialog is specified for the Coefficient source parameter, and is only enabled if User-defined is specified for the Set fractional bits in coefficients to parameter.
Set fractional bits in output to: Only 16 bits of the 32 accumulator bits are output from the block. Select which 16 bits to output:

Match input X--Output the 16 bits of the accumulator value that cause the number of fractional bits in the output to match the number of fractional bits in input X
Match coefficients H--Output the 16 bits of the accumulator value that cause the number of fractional bits in the output to match the number of fractional bits in coefficients H
Match high bits of acc. (b31:b16)--Output the highest 16 bits of the accumulator value
Match high bits of prod. (b30:b15)--Output the second-highest 16 bits of the accumulator value
User-defined--Output the 16 bits of the accumulator value that cause the number of fractional bits of the output to match the value specified in the Number of fractional bits in output parameter
See Matrix Multiply Examples for demonstrations of these selections.

Number of fractional bits in output: Specify the number of bits to the right of the binary point in the output. This parameter is only enabled if User-defined is selected for the Set fractional bits in output to parameter.
Initial conditions: If the initial conditions are

All the same, you need only enter a scalar.
Different within channels but the same across channels, enter a vector containing the initial conditions for one channel. The length of this vector must be one less than the number of coefficients.
Different across channels, enter a matrix containing all initial conditions. The number of rows of this matrix must be one less than the number of coefficients, and the number of columns of this matrix must be equal to the number of channels.

Algorithm

In simulation, the Symmetric Real FIR block is equivalent to the TMS320C62x DSP Library assembly code function DSP_fir_sym. During code generation, this block calls the DSP_fir_sym routine to produce optimized code.

Reciprocal To Rtdx