Getting Started

Delays in the Model

Due to the way they process data, some blocks cause a signal to be delayed as it passes through a model. For example, there is a delay of 6 symbol periods between the input signal to the M-FSK Modulator Passband block and the output signal from the M-FSK Demodulator Passband block. As a result, there is a delay of 6 symbol periods between the transmitted and received signals in the FSK model.

To calculate the bit error rate correctly, you need to introduce an additional delay of 6 seconds to the transmitted signal to synchronize it with the received signal. You can do this directly in the mask for the Error Rate Calculation block by setting the Receive delay to 6.

For the same reason, you need to synchronize the transmitted and received signals before they enter the Relational Operator block. In this case, you must use an Integer Delay block, which delays a signal by the number of sample periods specified by the Delay parameter. Set the Delay to 6. This is indicated by the exponent -6 on the block. The delay synchronizes the transmitted signal with the received signal so that the Relational Operator block can compare them correctly.

Note    If the Error Rate Calculation block in a model gives an error rate close to .5 for a random binary signal, you might not have taken into account delays in the model. The block is probably comparing two unsynchronized signals.

Several blocks in the Communications Blockset Modulation library produce delays. A list of these is given in Delays in Digital Modulation in Using the Communications Blockset. The Viterbi Decoder block, from the Convolutional sublibrary of the Error Detection and Correction library, also produces a delay equal to its Traceback depth parameter - see the section Viterbi Decoder.

Running the FSK Model

Finding the Delay in the Model