IS-95A Fwd Ch Descrambler (CDMA Reference Blockset)

Perform power bit extraction, rake combining, descrambling, and frame buffering

Library

IS-95 Mobile Station Receiver

Description

This is a hierarchical block performing power bit extraction, rake combining, descrambling and frame buffering. It extracts the power bit for each finger using the long code and combines the signals from all fingers. The extracted power bit is updated once every power group, that is, 16 times every 20 ms frame. There are two symbols carrying the power control bit in Rate Set I and only one symbol in Rate Set II.

After power bit extraction the block sets to zero the symbol(s) corresponding to the power control bit. The block subsequently descrambles the combined signal using the decimated long code sequence. It stores the descrambled data in a buffer to obtain one complete frame.

Inputs

Finger 1: Real scalar representing the demodulated symbol for finger 1.
Finger 2: Real scalar representing the demodulated symbol for finger 2.
Finger 3: Real scalar representing the demodulated symbol for finger 3.
Finger 4: Real scalar representing the demodulated symbol for finger 4.
Long Code: Real scalar of binary data representing the decimated long code value for the symbols to be descrambled.

Outputs

Real vector of size 384 representing the combined and descrambled data frame.

Dialog Box

Parameters

Rate set: The rate set, either Rate Set I or Rate Set II.
Tracking buffer size: Integer scalar that specifies the length of the buffer (in number of symbols) needed in the rake fingers. The block uses this parameter to adjust its delay with respect to the frame boundary.

IS-95A Fwd Ch Convolutional Encoder IS-95A Fwd Ch Detector