Target Language Compiler

A Basic Example

This section presents a basic example of creating a target language file that generates specific text from a Real-Time Workshop model. This example shows the sequence of steps that you should follow in creating and using your own target language files.

Process

To begin, create the Simulink model shown below and save it as basic.mdl.

Figure 4-1: Simulink Model

Selecting Simulation Parameters from Simulink's Simulation menu displays the Simulation Parameters dialog box.

Figure 4-2: Simulation Parameters Dialog Box

Select Fixed-step from the Solver pane of the Simulation Parameters dialog box and then click the Real-Time Workshop tab. Then, click the Generate Code only button. From the Category drop down list select the TLC Debugging option. The dialog changes, allowing you to select the Retain .rtw file option. After doing so, click the Generate Code button.

The build process then generates the code into the basic_grt_rtw directory and you can see the progress in the MATLAB window.

The output eventually displays:

• ### Successful completion of Real-Time Workshop build procedure for model: basic
  

Viewing basic.rtw.   

Open the file ./basic_grt_rtw/basic.rtw in a text editor to see what it looks like. The hierarchy of records it contains includes among others, the following elements (where elided lines are denoted by "..."; comments are delimited by < > and do not appear in the file).

• CompiledModel {
    <general model information, such as>
    Name        "basic"
    Version  "5.0 $Date: 2002/06/19 21:30:04 $"
    ModelVersion  "1.1"
    GeneratedOn  "Thu Feb 07 09:17:27 2002"
    ExprFolding  1
    TargetStyle  StandAloneTarget
    Solver  FixedStepDiscrete
    SolverType  FixedStep
    StartTime  0.0
    StopTime  10.0
    ...
    DataTypes {
      <definitions of datatypes used>
      NumDataTypes    13
      NumSLBuiltInDataTypes   9
      StrictBooleanCheckEnabled 0
      DataType {
        DTName      double
        Id      0
        IdAliasedTo      -10
        IdResolvesTo      0
        IsSigned      0
        RequiredBits      0
        FixedExp      0
        FracSlope      1
        Bias      0
        IsFixedPoint      0
      }
      ...
    }
    <Global properties of blocks, targets, inputs, outputs>
    ...
    BlockOutputs {
      <Specific block outputs>
      ...
    }
    DWorks {
      <DWorks storage description>
      ...
    }
    <States and Events>
    ContStates {
      NumContStates    0
    }
    NonsampledZCs {
      NumNonsampledZCs    0
    }
    ZCEvents {
      NumZCEvents    0
    }
    BlockDefaults {
      <Defaults for blocks>
      ...
    }
    ParameterDefaults {
          <Defaults for parameters>
      ...
    }
    DataInputPortDefaults {
          <Defaults for input ports>
      ...
    }
    <Other defaults>
    ...
    ModelParameters {
      NumParameters    2
      ...
      ParameterDefaults {
        ...
      }
      <Actual parameters>
      Parameter {
        ...
      }
      Parameter {
        ...
      }
    }
    <Signals>
    ...
    <Subsystems>
    ...
    <Subsystem blocks>
    NumSystems  1
    System {
      Type    root
      Name    "<Root>"
      ...
      NumTotalBlocks    3
      Block {
        Type      Constant
        BlockIdx      [0, 0, 0]
        ...
        Parameter {
          Name     "Value"
          Value        [1.0]
          String   "1"
          StringType"Expression"
          NeedParenthesis0
        }
        Value      Parameter[0]
      }
      Block {
        Type      Gain
        BlockIdx      [0, 0, 1]
        ...
        Name      "<Root>/Gain"
        Identifier      Gain
        TID      0
        RollRegions      [0]
        NumDataInputPorts      1
        ...
        ParamSettings {
          Multiplication"Element-wise(K.*u)"
          SaturateOnOverflowNotNeeded
        }
        Parameters      [1, 1]
        Parameter {
          Name     "Gain"
          ...
          Value    [1.0]
          String   "1"
          StringType"Expression"
          NeedParenthesis0
        }
        Gain      Parameter[0]
      }
      Block {
        Type      Outport
        BlockIdx      [0, 0, 2]
        ...
        Name      "<Root>/Out1"
        Identifier      Out1
        TID      0
        RollRegions      [0]
        NumDataInputPorts      1
        ...
        ParamSettings {
          VirtualizableRootno
          PortNumber1
          OutputLocationY0
          SpecifyICno
        }
      }
      EmptySubsysInfo {
        NumRTWdatas      0
      }
    }
    BlockParamChecksum  Vector(4)
  ["1563106944U", "312355339U", "1175093170U", "625369615U"]
    ModelChecksum  Vector(4)
  ["2667851175U", "2830856923U", "1096099938U", "890634863U"]
  }
  

Creating the Target File.   Next, create a basic.tlc file to act as a target file for this model. However, instead of generating code, simply print out some information about the model using this file. The concept is the same as used in code generation.

Create a file called basic.tlc in ./ (the directory containing basic.mdl). This file should contain the following lines:

• %with CompiledModel
  
  My model is called %<Name>.
  It was generated on %<GeneratedOn>.
  
  It has %<NumModelOutputs> output(s) and %<NumContStates> continuous states.
  
  %endwith
  

For the build process, you need to include some further information in the TLC file for the build process to successfully proceed. Instead, in this example, you will generate the .rtw file directly and then run the Target Language Compiler on this file to generate the desired output. To do this, enter at the MATLAB prompt

• rtwgen('basic', 'OutputDirectory', 'basic_grt_rtw')
  tlc -r basic_grt_rtw/basic.rtw basic.tlc -v
  

The first line generates the .rtw file in the build directory 'basic_grt_rtw', (this step is actually unnecessary since the file has already been generated in the previous step; however, it will be useful if the model is changed and the operation has to be repeated).

The second line runs the Target Language Compiler on the file basic.tlc. The -r option tells the Target Language Compiler that it should use the file basic.rtw as the .rtw file. Note that a space must separate -r and the input filename. The -v option tells TLC to be verbose in reporting its activity.

The output of this pair of commands is (date will differ):

• My model is called basic.
  It was generated on Mon Dec 03 09:42:13 2001.
  
  It has 1 output(s) and 0 continuous states.
  

You may also try changing the model (such as using rand(2,2) as the value for the constant block) and then repeating the process to see how the output of TLC changes.

As you continue through this chapter, you will learn more about creating target files.

Build Process

Invoking Code Generation