Target Language Compiler    

External Inputs and Outputs

The model.rtw file contains all information describing the external inputs (which correspond to root-level inport blocks) and external outputs (which correspond to root-level outport blocks). In control theory, the external inputs vector is conventionally referred to as U and the external output vector is referred to as Y. The generated code uses rtU and rtY.

Table A-10: Model.rtw External Inputs and Outputs 
Variable/Record Name
Description
ExternalInputs {

  ExternalInputDefaults {

    RecordType

ExternalInput. The record type is used by TLC in general processing of the model data structures. This value is never overridden.

    Width

1. The signal width of this external input.

    MemoryMapIdx

[-1,-1,-1]: used to populate global data map record (GlobalMemoryMap) during code generation. Refer to
matlabroot/rtw/c/tlc/mw/globalmaplib.tlc for usage information on the MemoryMapIdx field.

    HasObject

0: Has a Simulink.Signal object that is used to map the external inputs to a specific location. This will be = 1 if this port is associated with a Simulink.Data object.

    DataTypeIdx

0: The default signal data type is real_T.

    ComplexSignal

no: The default signal is not complex.

    DirectFeedThrough

yes: The default assumes the root inport requires its input.

    SigLabel

"": Label on the output segment of the inport block.

    StorageClass

Auto: The default value specifies that the Real-Time Workshop decides how external signals are declared.

    CustomStorageClassVersion

0: Custom storage class version used

    StorageTypeQualifier

"": The default type qualifier is empty.

  }

  NumExternalInputs

Integer number of records that follow, one per root-level inport block

  ExternalInput {

One record for each external input signal (i.e., root inport).

    BlockName

Input port block name with special characters removed so it can be used in comments.

    Identifer

Unique name across all external inputs to be used within the external input vector/structure.

    TID

Integer task id (sample time index) giving the SampleTime record for this inport block.

    Width

Signal width.

    Dimensions

Vector of the form [nRows, nCols] for the signal. Only written if number of dimensions is greater than 1.

    DataTypeIdx

Integer index of DataType record corresponding to this block. Only written if index is not 0.

    ComplexSignal

yes: Only written if this inport signal is complex.

    SigLabel

Signal label entered by user.

    DirectFeedThrough

no: Only written if this inport doesn't require its signal when MdlOutputs is called.

    StorageClass

Only written if not Auto. This setting determines how this signal is declared.

    StorageTypeQualifier

Only written if not empty.

    HasObject

HasObject = 1 if this port is associated with a Simulink Data Object.

    Object {

Object record is written if HasObject = 1. See "Object Information in the model.rtw File" in the Real-Time Workshop User's Guide. Also see Object Records.

  }

}

ExternalOutputs {

External outputs (root outports) from the block diagram.


  ExternalOutputDefaults {

    RecordType

ExternalOutput. The record type is used by TLC in general processing of the model data structures. This value is never overridden.

    Width

1: Signal width (default is 1).

    MemoryMapIdx

[-1,-1,-1]: used to populate global data map record (GlobalMemoryMap) during code generation. Refer to
matlabroot/rtw/c/tlc/globalmaplib.tlc for usage information on the MemoryMapIdx field.

    SigLabel

"": Label on the input segment of the outport block.

    HasObject

0: HasObject = 1 if this port is associated with a Simulink Data Object.

  }

  NumExternalOutputs

Number of ExternalOutput records that follow. This is equal to the number of root level outports.

  ExternalOutput {

One record per root-level outport block.

    Block

[sysIdx, blockIdx] of the outport block.

    Width

Signal width. Only present if not 1.

    Sysidx

[externalOutputVectorIndex, SignalWidth]

    Dimensions

Vector of the form [nRows, nCols] for the signal. Only written if number of dimensions is greater than 1.

    SigLabel

Label on the port signal, if any.

  }

}


  Block Type Counts Block I/O Information