Real-Time Workshop Embedded Coder

Virtualized Output Ports Optimization

The virtualized output ports optimization lets you eliminate code and data storage associated with root output ports under the following conditions:

1. The MAT-file logging option is cleared (this is the default for the Embedded Coder).
2. The TLC variable FullRootOutputVector equals 0. This is the default for the Embedded Coder.
3. The signal line entering the root output port is stored as a global variable. (See the Code Generation and the Build Process chapter of the Real-Time Workshop documentation for information on how to control signal storage in generated code.)

To illustrate this feature, consider the model shown in this block diagram. Assume that the signal exportedSig has exportedGlobal storage class.

In the default case (conditions 1 and 2 above are true), the output of the Gain block is written to the signal storage location, exportedSig. No code or data is generated for the Out1 block, which has become, in effect, a virtual block. This is shown in the following code fragment.

• /* Gain Block: <Root>/Gain */
    exportedSig = rtb_PulseGen * VirtOutPortLogOFF_P.Gain_Gain;
  

In cases where either the MAT-file logging option is enabled, or FullRootOutputVector = 1, the generated code represents root output ports as members of an external outputs vector.

The following code fragment was generated from the same model shown in the previous example, but with MAT-file logging enabled. The output port is represented as a member of the external outputs vector VirtOutPortLogON_Y. The Gain block output value is copied to both exportedSig and to the external outputs vector.

• /* Gain Block: <Root>/Gain */
    exportedSig = rtb_PulseGen * VirtOutPortLogON_P.Gain_Gain;
  
  /* Outport Block: <Root>/Out1 */
    VirtOutPortLogON_Y.Out1 = exportedSig;
  

The overhead incurred by maintenance of data in the external outputs vector can be significant for smaller models being used to perform benchmarks.

Note that you can force root output ports to be stored in the external outputs vector (regardless of the setting of MAT-file logging) by setting the TLC variable FullRootOutputVector to 1. You can do this by adding the statement

• %assign FullRootOutputVector = 1
  

to the Embedded Coder system target file. Alternatively, you can enter the assignment into the System Target File field on the Real-Time Workshop pane of the Simulation Parameters dialog box.

Basic Code Generation Options

Generating Code from Subsystems