Communications Blockset

PLL-Based Frequency Synthesis Demo

This example shows how to simulate a phase-locked loop (PLL) frequency synthesizer. The model multiplies the frequency (fr) of a reference signal by a constant N/M, to produce a synthesized signal whose frequency is fr*N/M. A feedback loop maintains the frequency of the synthesized signal at this level.

To open the model, type freqsyn_sim at the MATLAB prompt (or click here if you are reading this in the MATLAB Help browser). In addition to the model window, three Scope windows open, labelled "Control Signal", "Synthesized Signal" and "Reference Signal".

Phase Noise Effects in 256-QAM - Demo

Variables in the Model